AI-Guided Electrothermal Design for 2D CFETs AI辅助的2D CFET电热协同设计
arXiv:2609.17123 · 2026-09-15
An AI-agent workflow proposes a redistributed source interconnect and a substrate-directed heat-removal path for a modeled 12-nm 2D CFET inverter. Together they reduce peak temperature rise by 1.67 K at fixed metal volume and 20 μW; a resistance sensitivity study finds about 0.6 K of cooling with a 2% nFET on-current penalty. The result is an electrothermal-model study rather than measured silicon, so the main contribution is the constrained design-and-verification workflow, not proof of manufacturability. 该研究让AI智能体为一个12 nm 2D CFET反相器模型提出重新分配的源极互连,以及面向衬底的散热路径。在金属体积与20 μW功耗不变时,组合设计把峰值温升降低1.67 K;电阻敏感性分析还显示,可用2%的nFET导通电流损失换取约0.6 K降温。结果来自电热模型而非实测硅片,因此主要贡献是受约束的设计与验证流程,而非可制造性的证明。