Efficiency Work Moves Up the Stack 效率研究沿计算栈上移

This week's research candidates emphasize practical bottlenecks: lithography modeling, RF power design, GPU cache state, KV-cache compression, and kernel generation. The common thread is less about new peak compute and more about extracting usable efficiency from memory, tools, and physical constraints. 本期研究更关注实际瓶颈：光刻建模、射频功放设计、GPU缓存状态、KV-cache压缩和kernel生成。共同线索不是追求新的峰值算力，而是在内存、工具链和物理约束中挖出可用效率。

Look-back window: 7 days · 9 paper(s) 回溯窗口: 7天 · 9篇

Devices & Process 器件与工艺

Organic Semiconductor Alignment via Vapor-Guided Droplet Confinement 利用蒸汽引导液滴限域实现有机半导体取向

Robert Malinowski, Alessandro Rossi, Lewis M. Cowen, et al.

arXiv:2606.27207 · 2026-06-25T16:02:25Z

The paper uses flows inside microliter vapor-guided droplets to align organic semiconductor nanowires before deposition. Organic field-effect transistors made with the films show about 40% higher saturation current than spin-coated controls. The result is most interesting for printed and flexible electronics because the method is contactless and can work on curved substrates, but it is still a materials/process demonstration rather than a manufacturable line flow. 这篇论文利用微升级蒸汽引导液滴内部的流动，在沉积前对有机半导体纳米线进行取向。有机场效应晶体管测试显示，相比旋涂对照样品，饱和电流提升约40%。这对印刷和柔性电子很有意义，因为方法非接触且可用于曲面基底，但目前仍是材料与工艺演示，不是可直接量产的产线流程。

Circuits, Architecture & Reliability 电路、架构与可靠性

Residual GPU Cache State on Apple M4 Pro Apple M4 Pro上的GPU残留缓存状态

Faruk Alpay, Baris Basaran

arXiv:2606.27098 · 2026-06-25T14:35:28Z

Alpay and Basaran characterize cache state left after GPU commands on a 14-core Apple M4 Pro. Their Metal experiments show a reproducible post-GPU shared-cache displacement window that slows the first CPU traversal after large GPU footprints, with a second traversal clearing most of the cost. The work matters for unified-memory SoCs because CPU-GPU phase boundaries can create performance artifacts even when there is no simultaneous DRAM contention. Alpay和Basaran在14核Apple M4 Pro上刻画了GPU命令完成后留下的缓存状态。Metal实验显示，大GPU访问足迹会造成可重复的GPU后共享缓存置换窗口，使第一次CPU遍历变慢，而第二次遍历能清除大部分成本。这对统一内存SoC很重要，因为即使没有同时发生DRAM争用，CPU-GPU阶段边界也可能产生性能伪影。

KAN-Based Digital Predistortion for Analog Radio-over-Fiber Fronthaul 面向模拟Radio-over-Fiber前传的KAN数字预失真

Carlos Daniel Fontes da Silva, Tianyu Jiang, Lu Zhang, et al.

arXiv:2606.27042 · 2026-06-25T13:47:22Z

This paper demonstrates a Kolmogorov-Arnold Network digital predistortion model for nonlinear distortion in analog radio-over-fiber fronthaul. The symbolic ETDKAN version delivers ACLR and EVM close to neural-network models while keeping complexity near memory-polynomial DPD, and experiments show a 4-5 dB ACLR reduction. The practical angle is strong because fronthaul linearization is often limited by power and implementation cost, not only model accuracy. 这篇论文展示了用于模拟Radio-over-Fiber前传非线性失真的Kolmogorov-Arnold Network数字预失真模型。符号化ETDKAN在ACLR和EVM上接近神经网络模型，同时复杂度接近记忆多项式DPD，实验中ACLR降低4-5 dB。其实用价值在于，前传线性化常受功耗和实现成本限制，而不只是模型精度。

Deep-Learning Inverse Design for a Wideband Inverted Doherty PA 用于宽带反相Doherty功放的深度学习逆向设计

Han Zhou, Haojie Chang, David Widen, et al.

arXiv:2606.27002 · 2026-06-25T13:19:38Z

The authors combine CNNs and genetic algorithms to synthesize a pixelated combiner network for an inverted Doherty power amplifier. A fabricated GaN HEMT prototype reaches 51%-63% peak drain efficiency and 48%-54% 6 dB back-off efficiency from 1.9 to 2.5 GHz, with DPD bringing ACLR below -53.2 dBc. The measured prototype is the important part: it moves the inverse-design claim beyond layout search and into RF hardware results. 作者结合CNN和遗传算法，为反相Doherty功率放大器合成像素化合路网络。制成的GaN HEMT原型在1.9-2.5 GHz范围内达到51%-63%峰值漏极效率和48%-54%的6 dB回退效率，配合DPD后ACLR低于-53.2 dBc。关键在于它有实测原型，把逆向设计从版图搜索推进到射频硬件结果。

AI Accelerators & Compute-in-Memory AI加速器与存算一体

EGG: Expert-Guided Agent Framework for GPU Kernel Generation EGG：面向GPU Kernel生成的专家引导Agent框架

Yaochen Han, Ke Fan, Hongxu Jiang, et al.

arXiv:2606.26758 · 2026-06-25T08:44:26Z

EGG decomposes LLM-based GPU kernel generation into algorithmic structure design and hardware-specific tuning. The framework injects expert optimization principles for parallel mapping, tensor tiling, and memory behavior instead of relying on unguided code generation. The hardware relevance is direct: if the approach holds up on real kernels, it could reduce the human bottleneck in extracting performance from accelerators, though benchmark breadth and correctness guarantees remain the caveats. EGG把基于LLM的GPU kernel生成拆成算法结构设计和硬件特定调优两个阶段。该框架引入专家优化原则来指导并行映射、张量tiling和内存行为，而不是依赖无约束代码生成。其硬件相关性很直接：如果能在真实kernel上稳定成立，它可能缓解从加速器中榨取性能时的人力瓶颈，但基准覆盖范围和正确性保证仍是需要观察的限制。

AI Research for Hardware 面向硬件的AI研究

TOPS: First-Principles Visual Token Pruning for Efficient MLLM Inference TOPS：面向高效MLLM推理的第一性原理视觉Token剪枝

Tinghao Wang, Yichen Guo, Rui Huang, et al.

arXiv:2606.27161 · 2026-06-25T15:29:37Z

TOPS reframes visual-token pruning as constructing token optimal preservation sets based on task relevance, information coverage, and semantic diversity. It is training-free and model-agnostic, with experiments across seven MLLM backbones and 14 benchmarks. The hardware angle is that visual-token reduction directly cuts attention and memory traffic during multimodal inference, though the paper is still a systems method rather than measured accelerator silicon. TOPS把视觉token剪枝重新表述为构建最优token保留集合，核心原则是任务相关性、信息覆盖和语义多样性。该方法无需训练且与模型无关，并在7个MLLM骨干和14个基准上测试。硬件意义在于，减少视觉token会直接降低多模态推理中的attention计算和内存流量，不过这仍是系统方法论文，并非实测加速器芯片。

Information-Aware KV Cache Compression for Long Reasoning 面向长推理的信息感知KV-cache压缩

Jushi Kai, Zhuiri Xiao, Alexandra Birch, et al.

arXiv:2606.26875 · 2026-06-25T11:03:37Z

InfoKV adds information-theoretic signals to KV-cache compression, using predictive uncertainty and representation evolution alongside attention scores. The authors argue that high-uncertainty tokens can influence distant future contexts more than attention-only methods capture. For inference hardware, the relevant claim is lower cache footprint during long reasoning without simply discarding distant context, but deployment value depends on latency overhead and robustness across models. InfoKV在KV-cache压缩中加入信息论信号，把预测不确定性和层间表示演化与attention分数结合。作者认为，高不确定性token对远期上下文的影响可能超过纯attention方法能捕捉的范围。对推理硬件而言，关键主张是在长推理中降低缓存占用，同时不只是粗暴丢弃远端上下文，但部署价值取决于额外延迟和跨模型稳健性。

Quantum 量子

Efficient Foundation Decoders for Fault-Tolerant Quantum Computing 面向容错量子计算的高效Foundation Decoder

Ge Yan, Shanchuan Li, Shiyi Xiao, et al.

arXiv:2606.27119 · 2026-06-25T14:58:33Z

The paper proposes neural transfer unification to train foundation decoders across quantum error-correcting code distances. Its NTU-Transformer outperforms correlation-aware matching on a planar surface-code example and scales to larger code distances through transfer adaptation. The result is relevant because decoder training cost is a real bottleneck for fault-tolerant systems, but the evidence is still decoder benchmarking rather than a full hardware-control stack. 这篇论文提出neural transfer unification，用于跨量子纠错码距离训练foundation decoder。其NTU-Transformer在一个平面surface code例子上超过correlation-aware matching，并通过迁移适配扩展到更大的码距。这个结果相关性很强，因为decoder训练成本是容错系统的真实瓶颈，但证据仍是decoder基准测试，而不是完整硬件控制栈。

EDA & Design Tools EDA与设计工具

LithoDreamer: Physics-Informed World Model for Computational Lithography LithoDreamer：面向计算光刻的物理信息World Model

Yuqi Jiang, Yumeng Liu, Zimu Li, et al.

arXiv:2606.26713 · 2026-06-25T07:48:59Z

LithoDreamer models the layout-mask-resist-ADI flow as a multi-stage physical evolution problem rather than a single learned mapping. The framework uses physics-informed latent states and contrastive variational optimization to guide process interventions. It is relevant to EDA because computational lithography is increasingly a yield limiter at advanced nodes, but the abstracted benchmark setting means fabs would still need tool-calibrated validation. LithoDreamer把layout-mask-resist-ADI流程建模为多阶段物理演化问题，而不是单一的学习映射。该框架使用物理信息潜空间和对比变分优化来指导工艺干预。它对EDA有意义，因为计算光刻正日益成为先进制程良率限制因素，但其基准仍较抽象，晶圆厂还需要基于具体设备的校准验证。