semi·news
Headlines要闻 / Research研究 /
Research digest · Friday, May 22, 2026 研究摘要 · 2026年5月22日 星期五

Physics Limits Below, Scaling Infrastructure Above 下层逼近物理极限,上层架设扩展基础设施

This week's reading-list splits cleanly into two layers. At device level: 2D-altermagnet spintronics, GaN growth telemetry, autonomous low-light power management, and CPO thermal scheduling — each a paper about the analog reality that scaling is now hitting. At system level: a sparsity-aware GNN near-memory accelerator, NVIDIA's Spectrum-X multiplane network for giga-scale training, a high-fidelity LLM inference simulator, and a WebGPU runtime that pushes LLMs into the browser — each about how to scale around those analog limits. 本周阅读列表干净地分为两层。器件层:二维Altermagnet自旋电子学、GaN生长遥测、自主低光功耗管理、CPO热调度——皆为'缩放正在撞击的模拟现实'。系统层:稀疏感知的GNN近存储加速器、NVIDIA Spectrum-X千亿规模训练多平面网络、高保真LLM推理模拟器、以及把LLM推入浏览器的WebGPU运行时——皆为'如何绕开这些模拟限制继续扩展'。

Look-back window: 7 days · 8 paper(s) 回溯窗口: 7天 · 8篇

Devices & Process 器件与工艺

2D alternating ferrimagnetism with strain-controlled half-metallic state 应变调控的半金属态二维交替亚铁磁性 theoryspintronics2D-materials

et al. (see paper)

arXiv:2605.22319 · 2026-05-21

Altermagnets get momentum-dependent spin splitting with zero net magnetization — interesting for spintronics in principle but hard to manipulate without conventional magnetic fields. The paper proposes a 2D alternating-ferrimagnet phase that keeps the altermagnetic spin texture but adds a small uncompensated moment plus a strain knob that flips the system between half-metallic and semiconductor states. First-principles calculations only, no fabricated device, but the design opens a route to electric/mechanical control of spin currents that was missing in pure altermagnets. Altermagnet在零净磁矩下获得动量依赖的自旋劈裂,自旋电子学意义明确,但缺乏常规磁场以外的可操控手段。本文提出二维交替亚铁磁相,保留altermagnetic自旋纹理的同时引入小量未补偿磁矩,并通过应变开关实现半金属/半导体态切换。仅为第一性原理计算,无器件实现,但为'通过电学/力学控制自旋电流'打开了纯altermagnet中缺失的路径。

Four-way in-situ monitoring of Ga adsorption / desorption kinetics on GaN(0001) 四种原位手段同步监测GaN(0001)上Ga的吸附与脱附动力学 device-fabGaNin-situ

et al. (see paper)

arXiv:2605.22279 · 2026-05-21

GaN power-device and RF-device yield is bottlenecked by the early stages of epitaxial growth — once Ga coverage drifts away from the design point, you don't recover. The group runs four in-situ instruments simultaneously (RHEED, laser reflectometry, line-of-sight QMS, optical pyrometry) on the same growth, producing cross-validated kinetics across flux and temperature. The four-way correlation is the contribution: prior work used one or two instruments and reported curves that didn't always match between groups. Useful as a closed-loop control signal for production MOCVD/MBE tools. GaN功率器件与射频器件的良率受限于外延生长早期阶段——一旦Ga覆盖率偏离设计点,后续无法找回。作者在同一次生长中同时运行四种原位仪器(RHEED、激光反射、视线QMS、光学高温计),给出在通量与温度上交叉验证的动力学数据。'四仪同步'本身是贡献:此前工作仅用一两台仪器,曲线常在不同组之间不一致。对量产MOCVD/MBE设备的闭环控制具有直接参考价值。

Circuits & Architecture 电路与体系结构

Hardware-based multi-stage dynamic power management for low-light autonomous sensors 面向低光自主传感器的硬件多级动态功耗管理 circuit-designlow-powerIoT

et al. (see paper)

arXiv:2605.19879 · 2026-05-19

Photovoltaic-powered IoT nodes spend most of their lives near the energy-budget floor — and conventional software-managed sleep states burn enough wake-up energy to dominate the duty cycle. The proposed architecture moves the entire DPM state machine into hardware so wake/sleep transitions never round-trip through the MCU. Mostly a control-circuit design with measured savings on a representative sensor workload; the relevant question for chip designers is whether the silicon area cost is small enough to displace software PMUs by default at the low end. 光伏供电的IoT节点长期运行在能量预算下限附近,而传统软件管理的睡眠状态在唤醒能耗上就已占据大头。本文提出的架构将整个DPM状态机硬化,使唤醒/休眠转换不再绕回MCU。主要为控制电路设计,在代表性传感器负载上给出能耗实测改善;对芯片设计者真正有意义的问题是:这部分硅面积代价是否足够小,以至于可以默认替代低端市场的软件PMU。

AI Accelerators & Compute-in-Memory AI加速器与存算一体

Reconfigurable digital near-memory accelerator for GNN inference with sparsity awareness 面向GNN推理、具备稀疏感知的可重构数字近存储加速器 near-memoryGNNreconfigurable

et al. (see paper)

arXiv:2605.19405 · 2026-05-19

GNN inference is a two-stage pipeline — combination (dense, compute-heavy) followed by aggregation (sparse, memory-heavy) — and conventional accelerators get one stage right at the cost of the other. The paper presents a digital near-memory design that's reconfigurable between the two regimes, with sparsity-aware routing during aggregation. The 'complete discussion' framing in the title is unusual but the architecture is concrete; what's missing is comparison against the latest CXL-based memory-pool baselines. GNN推理本质上是两阶段流水线——combination(密集、计算重)与aggregation(稀疏、内存重)——传统加速器在两阶段间总要做让步。本文提出一种数字近存储设计,可在两种工况间重构,并在aggregation阶段引入稀疏感知的路由。标题中'complete discussion'表述较少见,但架构本身具体;欠缺的是与最新CXL内存池方案的对比。

AI Research (hardware-relevant) AI研究(与硬件相关)

Frontier: a decision-grade simulator for disaggregated / reasoning-heavy LLM serving Frontier:面向解耦执行/推理重型LLM服务的决策级仿真器 LLM-servingsimulationcapacity-planning

et al. (see paper)

arXiv:2605.21312 · 2026-05-20

Existing LLM-serving simulators were built when prefill-decode was the model — monolithic replicas, uniform requests. Production serving now mixes disaggregated execution, complex parallelism, stateful agentic workloads, and RL rollouts; the old simulators give the wrong answer for those designs. Frontier rebuilds the abstraction stack: per-component models for prefill nodes, decode nodes, KV-cache stores, with explicit latency/throughput/contention modeling. Useful for planning hardware deployments before committing capex. 现有LLM服务仿真器构建于'prefill-decode为模型'的时代——单体副本、均质请求。生产环境的服务现已混合解耦执行、复杂并行、有状态agentic负载与RL rollouts;旧仿真器在这些设计上给出错误答案。Frontier重建抽象栈:为prefill节点、decode节点、KV缓存存储提供分组件模型,并显式建模延迟/吞吐/竞争。在资本承诺前规划硬件部署时具有实用价值。

NVIDIA Spectrum-X multiplane Ethernet for giga-scale AI training fabrics NVIDIA Spectrum-X:面向千亿规模AI训练的多平面以太网 networkingtrainingvendor-paper

NVIDIA

NVIDIA

arXiv:2605.21187 · 2026-05-20

Distributed training across hundreds of thousands of GPUs has made the network the design constraint — and conventional scale-out Ethernet was not built for the determinism that AllReduce demands. Spectrum-X uses a multiplane architecture that replaces flow-level ECMP with per-packet load balancing while keeping in-order delivery semantics from the application's perspective. It's a vendor paper, so weight the numbers accordingly, but the architectural argument — 'AI fabrics need deterministic latency, not best-effort bandwidth' — is the through-line of the year for hyperscale networking. 在数十万GPU上的分布式训练已使网络成为设计约束——传统scale-out以太网并非为AllReduce所需的确定性而构建。Spectrum-X采用多平面架构,将流级ECMP替换为逐包负载均衡,同时在应用视角下保持顺序交付语义。这是厂商论文,数字需打折扣;但其架构主张——'AI网络需要确定性延迟,而非尽力而为的带宽'——是本年度超大规模网络的主旋律。

LlamaWeb: WebGPU-backed llama.cpp for memory-portable browser-side LLM inference LlamaWeb:基于WebGPU的llama.cpp后端,实现可移植浏览器内LLM推理 edge-LLMWebGPUbrowser

et al. (see paper)

arXiv:2605.20706 · 2026-05-20

Running an LLM in the browser is a privacy-and-portability story that has been technically marginal — WebGPU drivers vary wildly across hardware, and memory budgets are tight. LlamaWeb is a WebGPU backend for llama.cpp that handles multiple precisions (FP16/INT8/INT4) with a single performance-portable code path and an explicit memory budget. The interest isn't 'LLMs in browsers' — that's a known goal — but the demonstration that the runtime layer can paper over WebGPU's heterogeneity cleanly enough to make it production-relevant. 在浏览器中运行LLM对隐私与可移植性意义重大,但技术上长期处于边缘——不同硬件下WebGPU驱动差异极大、内存预算紧张。LlamaWeb是llama.cpp的WebGPU后端,以单一性能可移植代码路径处理多种精度(FP16/INT8/INT4),并显式管理内存预算。意义不在'浏览器跑LLM'(这是早就有的目标),而在于运行时层能足够干净地抹平WebGPU的硬件异构性,使其进入生产相关范围。

EDA, Verification & Design Automation EDA与设计自动化

Predictive software scheduling as a thermal-drift early-warning layer for co-packaged optics 预测性软件调度:为CPO提供热漂移早期预警层 EDAthermalco-packaged-optics

et al. (see paper)

arXiv:2605.18612 · 2026-05-18

TSMC's COUPE architecture for co-packaged optics puts micro-ring resonators inside the PIC layer of a 2nm/A16 system — and those rings drift catastrophically (±1.7 nm of resonance per a few degrees C). Closed-loop thermal compensation in hardware is hard at that timescale. The paper proposes a software early-warning layer: the OS scheduler watches per-tile thermal trajectories and bias-shifts workloads *before* the PIC drifts out of band, rather than reacting after. Methodology paper with simulation; would need to land inside a vendor RTOS to deploy. 台积电的COUPE架构将co-packaged optics的微环谐振器置于2nm/A16系统的PIC层——而这些谐振器的热漂移极为致命(几摄氏度即可造成±1.7 nm谐振偏移)。在该时间尺度上做硬件闭环补偿很难。本文提出一个软件早期预警层:由操作系统调度器监测各tile的热轨迹,在PIC漂出带宽之前主动迁移负载,而非事后响应。方法论级别,带仿真;若要部署需进入厂商RTOS。