AI Bottlenecks Pull Capital Across the Stack AI瓶颈牵引全栈资本

HBM and advanced-packaging constraints are drawing investment into memory capacity, CoWoS expansion, and alternative accelerator architectures. At the same time, High-NA EUV and new substrate experiments show manufacturing technology moving to support the next demand wave. HBM与先进封装瓶颈正把资本引向存储扩产、CoWoS扩容和替代性加速器架构。与此同时，High-NA EUV协作与新型衬底实验表明，制造技术也在为下一轮需求做准备。

AI & Accelerators AI与加速器

A China-Modified RTX 5090 Appears With 96GB of VRAM 中国改装版RTX 5090以96GB显存现身

Tom's Hardware · 8h ago Tom's Hardware · 8小时前

An alleged modified Nvidia RTX 5090 with 96GB of memory has appeared on Alibaba for $3,888, tripling the standard card's VRAM. The listing is unverified, but it illustrates how Chinese system builders are adapting consumer GPUs for memory-heavy AI workloads when datacenter accelerators are costly or restricted. 一款据称经过改装、配备96GB显存的Nvidia RTX 5090出现在阿里巴巴平台，标价$3,888，显存容量达到标准版的3倍。该商品信息尚未得到独立验证，但它显示出在数据中心加速器昂贵或受限时，中国系统厂商正把消费级GPU改造成面向大显存AI负载的替代方案。

Foundry & Manufacturing 晶圆代工与制造

TSMC Reportedly Plans to Double CoWoS Capacity by 2028 报道称台积电计划到2028年将CoWoS产能翻倍

Wccftech · 6h ago Wccftech · 6小时前

TSMC may double CoWoS capacity in 2028 from its 2026 level as AI-accelerator demand keeps advanced packaging tight, according to a Taiwanese media report. The same constraints are reportedly pushing work toward UMC and Amkor, while Intel could reach as much as 45,000 wafers per month of equivalent capacity by 2028. Packaging, not only leading-edge wafers, remains a gating resource for AI-system shipments. 据台湾媒体报道，在AI加速器需求持续挤压先进封装供给之际，台积电可能在2028年把CoWoS产能较2026年水平翻倍。现有瓶颈据称正把部分订单推向联电与Amkor，而Intel到2028年的同类产能可能达到每月45,000片晶圆。制约AI系统出货的关键资源仍不只是先进制程晶圆，也包括封装。

Memory 存储

Micron Targets 100,000 HBM Wafers a Month Micron瞄准每月100,000片HBM晶圆

Asia Economy · 2h ago Asia Economy · 2小时前

Micron is targeting monthly HBM wafer capacity of 100,000 units, according to Asia Economy's Chip Talk report. Reaching that scale would strengthen a third supplier against SK hynix and Samsung in a market where AI demand has kept HBM availability tight. The target is a capacity ambition rather than a measure of finished-stack output, which also depends on yield and packaging throughput. 据《亚洲经济》的Chip Talk报道，Micron把HBM月度晶圆产能目标定在100,000片。若达到这一规模，Micron将在AI需求持续造成HBM紧缺的市场中，增强其相对于SK hynix和Samsung的第三供应商地位。该数字是产能目标，并不等同于成品堆栈出货量，后者还取决于良率和封装吞吐。

RPI and IBM Cut HBM ECC Controller Overhead for AI Inference RPI与IBM降低AI推理中的HBM ECC控制器开销

Semiconductor Engineering · 3h ago Semiconductor Engineering · 3小时前

Researchers at RPI and IBM propose REACH, a controller-managed ECC approach intended to reduce HBM error-correction overhead during AI inference. Moving more reliability management into the controller could reclaim bandwidth and capacity otherwise consumed by protection logic. The work matters because HBM efficiency, not nominal bandwidth alone, increasingly limits accelerator utilization. RPI与IBM研究人员提出REACH，这是一种由控制器管理的ECC方案，目标是降低AI推理期间HBM纠错开销。把更多可靠性管理放到控制器侧，有望释放原本被保护逻辑占用的带宽与容量。随着HBM效率而非名义带宽日益限制加速器利用率，这项工作具有直接的系统意义。

Equipment & Materials 设备与材料

Molybdenum Quasi Phase-Only Masks Improve EUV Imaging 钼准纯相位掩模改善EUV成像

Semiconductor Engineering · 3h ago Semiconductor Engineering · 3小时前

NYCU and TSMC report improved EUV imaging with molybdenum quasi phase-only masks. The result points to mask-stack engineering as another lever for pattern fidelity as conventional EUV approaches their process limits. Adoption will depend on whether the imaging gain survives mask fabrication, defect control, and production-scale inspection. NYCU与台积电报告称，采用钼准纯相位掩模可改善EUV成像。该结果表明，当传统EUV逐步逼近制程极限时，掩模堆栈工程仍可成为提升图形保真度的一项手段。其能否导入量产，将取决于成像收益能否经受掩模制造、缺陷控制和大规模检测的考验。

Fabships Test Space Vacuum for Compound-Semiconductor Substrates Fabship测试利用太空真空制造化合物半导体衬底

EE Times · 4h ago EE Times · 4小时前

Startup Besxar completed its first SpaceX flight and recovered wafer samples without contamination while testing space vacuum for compound-semiconductor substrate processing. The experiment asks whether orbit can replace some costly terrestrial vacuum infrastructure. A clean sample recovery is an early feasibility signal, not yet evidence of economical or scalable manufacturing. 初创公司Besxar完成首次SpaceX飞行，并在利用太空真空进行化合物半导体衬底处理的实验中无污染地回收了晶圆样品。这项实验试图验证轨道环境能否替代部分昂贵的地面真空基础设施。样品洁净回收只是早期可行性信号，尚不能证明该模式具备经济性或规模化制造能力。

Intel Foundry and ASML Expand High-NA EUV Readiness Work Intel Foundry与ASML扩大High-NA EUV就绪合作

Intel · 10h ago Intel · 10小时前

Intel Foundry and ASML announced a collaboration aimed at accelerating industry readiness for High-NA EUV. Coordinating scanner capability with process development can shorten the path from exposure-tool installation to usable production flows. The announcement does not by itself establish yield or volume readiness, but it reinforces Intel's role as an early High-NA integration site. Intel Foundry与ASML宣布合作，以加快业界为High-NA EUV做好准备。把扫描仪能力与制程开发协同推进，有望缩短设备安装到形成可用量产流程之间的周期。该公告本身并不能证明良率或量产已经就绪，但进一步凸显Intel作为High-NA早期整合场地的角色。

Policy & Geopolitics 政策与地缘政治

The Billion-Dollar Chip Narrows Who Can Design at the Leading Edge 十亿美元芯片收窄先进设计参与者范围

CSIS · 1h ago CSIS · 1小时前

CSIS examines how leading-edge chip programs are moving into billion-dollar design-cost territory and asks which companies and countries can still participate. Rising NRE, verification, software, and packaging costs concentrate advanced design among firms with large balance sheets or state backing. That concentration turns design economics into an industrial-policy issue, not merely a technology problem. CSIS分析指出，先进芯片项目的设计成本正进入十亿美元量级，并追问哪些公司和国家仍有能力参与。不断上升的NRE、验证、软件和封装成本，使先进设计日益集中于拥有雄厚资产负债表或政府支持的参与者。由此，设计经济性已不只是技术问题，也成为产业政策议题。

Sugon Loses IO500 Production Crown on Reproducibility Rules 曙光因可复现性规则失去IO500 Production榜首

Tom's Hardware · 8h ago Tom's Hardware · 8小时前

Sugon's ParaStor F9000 entries were removed from the IO500 Production ranking and moved to the Research list after failing the benchmark's reproducibility requirements. The rules require broadly available architectural detail and hardware availability, allowing the Intel-powered Aurora system to retake the top position. For a sanctioned Chinese supercomputing supplier, the decision shows how transparency and availability standards can shape international benchmark standing alongside raw performance. 曙光ParaStor F9000因未满足IO500的可复现性要求，被移出Production榜单并转入Research列表。相关规则要求架构细节能够广泛获取、硬件具备可获得性，因此采用Intel处理器的Aurora系统重新登顶。对于一家受到制裁的中国超算供应商，这一决定表明，除原始性能外，透明度和可获得性标准同样会影响国际基准排名。

Challengers & New Silicon 新势力与新硅

Positron AI Lands $875 Million for a Commodity-Memory Accelerator Push Positron AI获得8.75亿美元，推进通用存储加速器路线

BigGo Finance · 6h ago BigGo Finance · 6小时前