AI infrastructure turns memory into strategy AI基础设施让存储成为战略焦点

New HBM capacity, inference-silicon moves, and growing optical and test demand show that the AI build-out is increasingly governed by data movement and memory supply. Policy scrutiny is following the compute wherever it can be reached remotely. HBM扩产、推理芯片布局以及光互连和测试需求上升表明，AI基础设施建设正越来越受数据搬运与存储供给制约。只要算力能够被远程触达，政策审查也随之而来。

AI & Accelerators AI与加速器

AMD adds Taalas to its inference-silicon strategy AMD将Taalas纳入其推理芯片战略

The Next Platform · 5h ago The Next Platform · 5小时前

AMD is positioning Taalas as a route to bake model-specific inference more directly into its chip portfolio. The approach seeks efficiency by tailoring silicon closely to a model and deployment target, rather than relying only on broadly programmable accelerators. It is a strategic bet that diverse inference workloads will reward specialized hardware alongside GPUs. AMD正将Taalas定位为把模型专用推理能力更直接融入其芯片组合的路径。这一思路通过让硅实现与模型及部署目标紧密匹配来追求效率，而不只依赖通用可编程加速器。该交易押注于多样化的推理工作负载将为GPU之外的专用硬件创造空间。

Lightmatter maps co-packaged optics around NVLink and Taiwan Lightmatter围绕NVLink与台湾供应链规划共封装光学

DigiTimes · 1h ago DigiTimes · 1小时前

Lightmatter outlined a co-packaged-optics path tied to Nvidia NVLink and Taiwan-based supply chains. Scale-out systems must move more data between packages without multiplying power and thermal load, making interconnect a constraint alongside compute. CPO remains difficult to manufacture and service, but its roadmap is becoming more tightly coupled to accelerator interconnects. Lightmatter勾勒了与Nvidia NVLink及台湾供应链相衔接的共封装光学路径。横向扩展系统必须在不成倍增加功耗和散热负担的情况下让更多数据跨封装流动，使互连与计算同样成为约束。CPO在制造和维护上仍很困难，但其路线图正与加速器互连更紧密地绑定。

Foundry & Manufacturing 晶圆制造

TSMC and NYCU report a 2D-transistor interface advance 台积电与阳明交大报告二维晶体管界面进展

Wccftech · 8h ago Wccftech · 8小时前

TSMC and National Yang Ming Chiao Tung University demonstrated a monolayer MoS2 transistor approach that engineers a buffer in the channel before gate-stack formation. The work targets a central obstacle for two-dimensional devices: retaining useful transistor behavior at a difficult interface. It is research rather than a production-node announcement, but it points to the materials work behind sub-1-nm device roadmaps. 台积电与国立阳明交通大学展示了一种单层MoS2晶体管方法：在形成栅极堆叠之前先对沟道中的缓冲层进行工程化。该工作瞄准二维器件的核心难题，即在难以控制的界面上保持可用的晶体管特性。这仍是研究成果而非量产节点公告，但它指向了亚1nm器件路线图背后的材料工作。

Memory 存储

SK hynix commits 54 trillion won to Korean semiconductor plants SK海力士向韩国半导体工厂投入54万亿韩元

Chosun Ilbo · 1h ago Chosun Ilbo · 1小时前

SK hynix will invest 54 trillion won in semiconductor plants in Yongin and Cheongju, according to the report. The commitment gives the memory supplier a large manufacturing base for the AI-driven HBM and DRAM cycle rather than relying on incremental capacity additions. Its scale signals that memory makers expect tight demand to persist long enough to justify multi-site spending. 报道称，SK海力士将向龙仁和清州的半导体工厂投资54万亿韩元。这笔承诺为该存储厂商在AI驱动的HBM和DRAM周期中提供了大规模制造基础，而非仅依靠渐进式扩产。其规模表明，存储厂商预计供需紧张将持续足够长时间，从而值得进行多基地投资。

Nvidia reportedly weighs less HBM for Rubin Ultra 报道称Nvidia正评估为Rubin Ultra减少HBM配置

SEDaily · 1h ago SEDaily · 1小时前

Nvidia is reportedly considering reducing HBM content in Rubin Ultra to contain cost. Any such change would show how quickly memory has become a first-order bill-of-materials and supply-chain issue for AI accelerators. The report is not a product specification, but it highlights the trade-off between bandwidth, capacity, and system economics. 报道称，Nvidia正考虑减少Rubin Ultra的HBM配置以控制成本。任何此类调整都说明，存储已迅速成为AI加速器物料成本和供应链中的一级变量。该报道并非产品规格确认，但凸显了带宽、容量与系统经济性之间的权衡。

Kioxia demonstrates a PCIe Gen6 SSD above 10 million IOPS 铠侠展示每秒逾千万IOPS的PCIe Gen6 SSD

ServeTheHome · 6h ago ServeTheHome · 6小时前

Kioxia showed its GP1 PCIe Gen6 NVMe SSD operating at just over 10 million IOPS at FMS 2026. The demonstration puts storage performance in the same conversation as accelerator feeding and data-center fabric upgrades. Sustaining that result in deployed systems will depend on host interfaces, cooling, and workload behavior, not the drive alone. 铠侠在FMS 2026展示了其GP1 PCIe Gen6 NVMe SSD，运行性能略高于每秒1,000万IOPS。这一演示使存储性能与加速器供数能力和数据中心网络升级进入同一讨论框架。在实际部署中能否维持该结果，还取决于主机接口、散热和工作负载行为，而不仅是驱动器本身。

Equipment & Materials 设备与材料

Onto Innovation backlog crosses $1 billion Onto Innovation积压订单突破10亿美元

Pulse 2.0 · 7h ago Pulse 2.0 · 7小时前

Onto Innovation’s backlog has moved above $1 billion for the first time, while its advanced-nodes revenue rose 50%, according to the report. The figures connect AI-chip demand to the inspection and metrology layers required to ramp advanced manufacturing. A backlog is not booked revenue, but it offers a useful read on how long demand is reaching beyond wafer fabrication itself. 报道称，Onto Innovation的积压订单首次超过10亿美元，其先进节点收入增长50%。这些数据把AI芯片需求与先进制造扩产所需的检测和量测环节联系起来。积压订单并非已确认收入，但它有助于观察需求延伸到晶圆制造之外的持续时间。

Policy & Geopolitics 政策与地缘政治

US reviews China’s remote access to Nvidia chips 美国审查中国对Nvidia芯片的远程访问

The Next Web · 9h ago The Next Web · 9小时前

The US is reviewing China’s remote access to Nvidia chips, according to the report. The issue extends export-control enforcement beyond physical shipment: cloud or remote use can still provide access to restricted compute. The outcome could affect how providers authenticate customers, allocate capacity, and operate AI services across borders. 报道称，美国正在审查中国对Nvidia芯片的远程访问。该问题将出口管制执行从实物出货延伸到云端和远程使用，因为后者同样可能提供受限算力。其结果可能影响服务商如何验证客户身份、分配容量以及跨境运营AI服务。

GAO asks Commerce to detail semiconductor R&D plans 美国政府问责局要求商务部细化半导体研发计划

ExecutiveGov · 4h ago ExecutiveGov · 4小时前

The Government Accountability Office urged the Commerce Department to provide more detail on its semiconductor R&D-program plans. The request puts attention on implementation rather than headline funding, including how federal research efforts will be scoped and measured. Public R&D is meant to complement manufacturing incentives, not merely duplicate them. 美国政府问责局敦促商务部进一步说明其半导体研发项目计划。这一要求将关注点从资金标题转向执行细节，包括联邦研究工作的范围界定和衡量方式。公共研发环节应当补充制造激励，而非简单重复。

Challengers 挑战者

SK Telecom and Rebellions expand Korean AI-chip infrastructure SK Telecom与Rebellions扩大韩国AI芯片基础设施

UPI · 2h ago UPI · 2小时前